Now that I have some Kicad experience under my belt, time to get back to this poor fellow.
Lots of issues, covered already. Last, remaining issue (?) is possibly a problem in the two banks of 16KB of DRAM.
I initially was going to try 32KB of SRAM connected via the expansion port, but am thinking of replacing the internal DRAM board (the “store board“). The main issue is going from multiplexed addressing with RAS & CAS signals to using a flip-flop to latch the RAS address ...
I avoided going this route initially as replacing the internal board would still require the RAS & CAS to be generated ... or something. Dunno.
Will start re-drawing the schematic in Kicad and go from there.