FPGA/SoC + DDR PCB Design Tips - Phil’s Lab #59

FPGA/SoC with DDR3 memory PCB design overview, basics, and tips for a Xilinx Zynq-based System-on-Module (SoM). Mixed-signal hardware design course: [SUPPORT] Free trial of Altium Designer: Patreon: [LINKS] Advanced PCB design course survey: Rick Hartley video: Previous FPGA/SoC video: GitHub: [TIMESTAMPS] 00:00 Introduction 00:30 Altium Designer Free Trial 00:50 Advanced PCB Design Course Survey 01:30 System Overview 02:37 Power Supplies (Schematic) 03:50 Power Supplies (PCB) 06:33 Vias as Test Points 07:04 Layer Stack-Up 08:55 Impedance Calculation and Via Types 10:22 GND Layers and Power Distribution 13:30 BGA and Decoupling Layout 16:12 Routing, Colours, Packag Delays, and Time Matching 22:00 DDR Termination 23:11 Pad Pitch Tip 24:18 Final Tips ID: QIBvbJtYjWuHiTG0uCoK